How to Do a Million Watchpoints: Efficient Debugging Using Dynamic Instrumentation (2007)
Zhao, Qin, Amarasinghe, Saman P., Rabbah, Rodric M., Rudolph, Larry, Wong, Weng Fai
Application debugging is a tedious but inevitable chore in any software development project. An effective debugger can make programmers more productive by allowing them to pause execution and inspect...
How to Do a Million Watchpoints: Efficient Debugging Using Dynamic Instrumentation (2007)
Zhao, Qin, Amarasinghe, Saman P., Rabbah, Rodric M., Rudolph, Larry, Wong, Weng Fai
Application debugging is a tedious but inevitable chore in any software development project. An effective debugger can make programmers more productive by allowing them to pause execution and inspect...
Compiler Orchestrated Prefetching via Speculation and Predication (2004)
Rodric M. Rabbah, Hariharan Sandanagobalane, Mongkol Ekpanyapong, Weng-fai Wong
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. We focus the scope of...
Versatility and VersaBench: A New Metric and a Benchmark Suite for Flexible Architectures (2004)
Rabbah, Rodric M., Bratt, Ian, Asanovic, Krste, Agarwal, Anant
For the last several decades, computer architecture research has largely benefited from, and continues to be driven by ad-hoc benchmarking. Often the benchmarks are selected to represent workloads...
Versatility and VersaBench: A New Metric and a Benchmark Suite for Flexible Architectures (2004)
Rabbah, Rodric M., Bratt, Ian, Asanovic, Krste, Agarwal, Anant
For the last several decades, computer architecture research has largely benefited from, and continues to be driven by ad-hoc benchmarking. Often the benchmarks are selected to represent workloads...
Design Space Optimization of Embedded Memory Systems via Data Remapping (2002)
Krishna V. Palem, Rodric M. Rabbah, Pinar Korkmaz, Kiran Puttaswamy
In this paper, we provide a novel compile-time data remapping algorithm that runs in linear time. This remapping algorithm is the first fully automatic approach applicable to pointer-intensive...
Krishna V. Palem, Rodric M. Rabbah, Pinar Korkmaz, Kiran Puttaswamy
In this paper, we provide a novel compile-time data remapping algorithm that runs in linear time. This remapping algorithm is the first fully automatic approach applicable to pointer-intensive...
Data Remapping for Design Space Optimization of Embedded Cache Systems (2002)
Palem, Krishna V., Rabbah, Rodric M.
In this paper, we present a novel linear time algorithm for data remapping that is (i) lightweight, (ii) fully automated and (iii) applicable in the context of pointer-centric programming languages...
Power Optimization of Embedded Memory Systems via Data Remapping (2002)
Palem, Krishna V., Rabbah, Rodric M., Korkmaz, Pinar, Puttaswamy, Kiran
In this paper, we provide a novel compile-time data remapping algorithm that runs in linear time. This remapping algorithm is the first fully automatic approach applicable to pointer-intensive...
Banakar, Rajeshwari, Ekpanyapong, Mongkol, Puttaswamy, Kiran, Rabbah, Rodric M., Balakrishnan, M., ...
In this paper a system level energy model called TRIREME, is presented for HPL-PD microarchitecture which is used in Trimaran Compiler framework studies. The number of accesses for the various...
Bridging Processor and Memory Performance in ILP Processors via Data-Remapping (2001)
Krishna V. Palem, Rodric M. Rabbah
Current system design trends continue to magnify the disparity between processor and memory performance. Thus, as microprocessors perform increasingly better than the memory systems supporting them,...
Cache Senstive Instruction Scheduling (2001)
Charles R. Hardnett, Rodric M. Rabbah, Krishna V. Palem, Weng Fai Wong
The processor speeds continue to improve at a faster rate than the memory access times. The issue of data locality is still unsolved, and continues to be a problem given the widening gap between...
Bridging Processor and Memory Performance in ILP Processors via Data-Remapping (2001)
Rabbah, Rodric M., Palem, Krishna V.
Current system design trends continue to magnify the disparity between processor and memory performance. Thus, as microprocessors perform increasingly better than the mem-ory systems supporting them,...
Cache Sensitive Instruction Scheduling (2001)
Hardnett, Charles R., Rabbah, Rodric M., Palem, Krishna V., Wong, Weng Fai
The processor speeds continue to improve at a faster rate than the memory access times. The issue of data locality is still unsolved, and continues to be a problem given the widening gap between...
Design Space Exploration and Optimization of Embedded Cache Systems via a Compiler (1998)
Rabbah, Rodric M., Palem, Krishna V.
Presentation on design space exploration and optimization of embedded cache systems via a compiler.
Versatile Tiled-Processor Architectures: The Raw Approach (1998)
Rabbah, Rodric M., Bratt, Ian, Agarwal, Anant, Asanovic, Krste
This presentation will describe the Raw architecture, its implementation, and performance. We will focus on Raw's ability to support a diverse set of applications (ranging from desktop to embedded...